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The specs

According to IEC 60958-1 (SP/DIF spec), PCM (Pulse-Code-Modulation) is encoded in the following way:

In each 32-bit "frame", bits 0-3 (sync preamble) is bit for bit, no encoding. The following bits 4-31 (which include 16 bits of data) are encoded in "biphase-mark" to minimize long periods of DC on the signal. This helps to reduce the jitter due to data pattern and insures that the data cannot look like the sync preamble.

The recovered clock will have any jitter caused by the transmitting end and the cable. The intrinsic output jitter is speced as: maximum 5% of 1/2 the period or less. The receiver is speced to decode data with jitter of 20% of 1/2 the period without error.

The line driver is actually speced at 75 ohms +/- 20% and the waveform is defined as: the edge-rate is at least as fast as 40% of 1/2 the period, but in practice it is limited to reduce radiated EMI. The reciever impedance is speced as 75 ohms =/- 5%.


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