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RE: DRAM or SRAM?

Yes it has to be DRAM in order to get enough bytes to hold your 4 GB of music. If you access the DRAM correctly the read accesses will be sufficient for refresh, so there should be no need for separate refresh cycles.

My first thought was to use SODIMMs, BUT they are designed to use 64 bit busses all the time, that's a lot of data changing at once and takes a LOT of pins on the FPGA. I think it will be better to go with raw DRAM chips and go with 8 bits at a time, that way fewer wires switch at once, you have to do more memory access cycles, but there is a lot less going on for each one so the "memory access energy" gets spread out, less "bursty". The interface to a single DRAM chip is actually quite simple, very easy to implement in an FPGA.

John S.


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  • RE: DRAM or SRAM? - John Swenson 16:18:49 07/22/12 (0)

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