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RE: Metal Grain Structure

This latice can be substantially altered by the process used.

As an example? ALL silicon wafers used in semiconductor manufacture are grown in a hot melt situation with a single crystal 'seed' used for growth pattern. So you end up with essentially single crystal wafers....after slice and polish...

For example? In semiconductor processing, we manipulated depostion rate of Aluminum /1% Silicon films from about 1/2 micron to 1.5 microns.....(5000 angrstoms to 15000 angstroms) at the same time as we varied the partial pressure of the ARGON used as the sputtering gas.

At one point, my small test group INDUCED a small leak in a system (a hair across a criticla seal) in order to try to impair the film. Product still worked but was so cloudy as to be nearly impossible to pattern in a photolithography tool.....a Stepper.....

When the systems were brought up? REsistivy was measured and the film thickness was also measured. This gave a 'constant' which we could plug in so if we measured resistivity, we got a very good value for actual thickenss....

And while the Duke is rightly concerned with small interconnects? You ALSO have electromigration where the aluminum tends to 'flow' with the electrons. At the thinnest point, the current density RISES and it is possible to get a fuse effect which kills the device. Typically, you are concerned with 'Step Coverage' where the film goes over 'steps' in the substrate. It is difficult to get even coverage on ALL Surfaces of such steps.....
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