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In Reply to: RE: 'IMO, SPDIF from a computer would be the last method of connectivity to use as far as digital connections. posted by maabx on March 20, 2008 at 06:14:24
"Steve, are you making a claim here that the Theta Timebase Linque Conditioner throws away samples to achieve its purpose?"
It has to if the design is as described. Read the description of the DDDAC. Identical implementation I believe:
http://www.dddac.de/ma_dac21.htm
Ultra-low jitter in my book is 10's of picoseconds, not 1nsec.
Steve N.
Follow Ups:
...per the linked circuit diagram, the DDDAC is not implemented like the Theta TLC. The DDDAC has the digital receiver (CS8412), an XO Clock (additional crystal oscillator), a 12-stage binary ripple counter (74HC4040, used for the D-type flip-flop?), and no high speed hex inverters. Compare and contrast that to the description offered of the Theta TLC:
"The TLC uses a free running PLL within the CS8412 interface for clock recovery and jitter suppression without a second crystal-based lock (as used by Audio Alchemy, for example). The digital output is re-clocked via a D-type flip-flop with extra 'signal conditioning provided by a high-speed hex inverter—hence the TLC's high output level, clean waveshape and fast risetime."
You are correct, if there is no oscillator in the device then it is not the same design. Too bad. The DDDAC although dropping a few samples actually has a much better chance to achieve really low jitter.
Steve N.
And the test results for the products to which you are alluding, the ones with ultra-low jitter of 10's of picoseconds, are where?
'Read the description of the DDDAC. Identical implementation I believe:
http://www.dddac.de/ma_dac21.htm'
Sorry Steve, aside from using the same receiver, I see nothing identical in the implementation. Maybe you would like to point out the exact text that points to an identical implementation.
So, you are a manufacturer. And you say that the Theta TLC has to throw away samples. Putting aside the Theta for the moment, where does it state in the link you provided that the DDDAC (which apparently has many versions) throws away samples? Is it your understanding that it's the only possible way that it can stay sync'd?
Yes, it is the only possible way that it stays synced. It must throw away samples. This is a feature of this particular receiver, and the DDDAC takes advantage of this. If the local clock is tuned fairly close to the stream source, then the drops are infrequent and probably not audible. If the stream and the local clock are different in frequency by say 1000PPM, then it may become audible IMO. This would be a missing sample about every second.
Steve, I realize that raw jitter numbers expressed in ps or ns mean nothing out of context. But, in your opinion, can you state what you believe to be the threshold level, above which, jitter can become audible? I don't mind if you want to put it into context, or whether it is stated in ps, ns or ppm. And I realize there have been studies on the matter. And that the studies are not consistent. But what is your opinion? I don't feel like I can hear jitter in my current setup, as I've heard it described many times.
I have devices now with extremely low jitter. Cannot be measured on a scope at 3nsec per division. I have to believe that below 200-300psec it is pretty much inaudible in the very best systems on the planet. You have to understand that a system capable of discerning this is a world-class system with extremely low noise and sibilance. I believe only about .1% of systems in existence are in this league. Every component in the system, and the cables must be the very best, and modded not stock. No combination of stock components is capable of this level of performance IMO. When I do an A/B test of jitter, virtually every listener hears the difference. The effect is not subtle in an ultra-quiet system.
If you are not hearing differences in jitter, you are not alone. Most systems have enough other noise and sibilance to drown it out.
Steve N.
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