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RE: Cable effects same regardless of USB mode

Posted by John Swenson on November 30, 2009 at 13:18:47:
I'd like to amplify some of these points and give some examples. Then I'll cover some of the differences between how these work with adaptive and asynchronous modes.

The assumption I see that many people hold is that somehow asynchronous modes eliminates jitter (which can never happen) or at least completely eliminates the possibility of anything on the interface (cable) from affecting the jitter in the DAC. I hope to give some reasons why this is not he case.

As Slider mentioned the USB receiver is the same in asynch mode. Anything that can affect the jitter on the output signals in adaptive mode can affect them in async mode. The USB receiver puts the data in a FIFO and a clock clocks them out. The big difference is where the clock comes from, in adaptive mode its a PLL frequency synthesizer, in async its a crystal oscillator (or at least it should be). In both modes there are currents flowing through the ground and power traces of the chip which can cause jitter on the signals coming out of the chip. These internal currents CAN be affected by whats happening on the USB bus, which can be affected by the cable and by timing inside the computer driving the bus.

What happens next depends on how the DAC is put together, some may feed the I2S from the receiver chip directly to DAC chip(s) others may reclock the I2S, or convert it to a different format and maybe reclock those signals.

Lets look at the case of going directly to the DAC chips. In this case the local clock gets fed directly to the DAC chip and the assumption is that because the clock comes directly from the low jitter oscillator the audio coming out cannot possibly be affected by any jitter from the input. This is NOT the case. The (non clock) input signals cause gates inside the DAC chip to turn on and off, and every time this happens currents flow on the internal ground and power traces in direct response to the jitter on those input signals. Again these currents can add jitter to the other internal signals including the clock and other control signals generated from the clock. The result is that jitter on non-clock input signals can and does add jitter to the internals of the DAC chip, affecting the analog output.

Exactly how much of this happens varies from DAC chip to DAC chip. Its is theoretically possible to design a DAC chip so these affects are minimized but this has not been a priority with any DAC chip manufacturer to my knowledge.

Now lets look at the other option, where the I2S lines are reclocked before entering the DAC chip. If you greatly decrease the jitter on these lines then the above shouldn't matter. Well unfortunately nobody knows how to implement a reclocker that is completely immune to the jitter on its input. What happens in the DAC chip also happens in the flip flop chip, currents flow in the chip due to the jittery input signal causing jitter on the output. So why do it? Because it does help to attenuate the jitter but it doesn't completely eliminate it. So some jitter still gets through.

And on top of all this, the currents flowing through the chips due to jitter at various places also show up on the traces and planes of the PC board. The same thing happens: output jitter is added to the output signal due to jitter on signals in other parts of the board. Again this can be minimized by very careful board layout but you can't completely get rid of it. Unfortunately very few people really have a high level of expertise in this, and there is not an awful lot of information on how to so this floating around. Its only fairly recently that the engineering community has even starting to deal with this so how to effectively work with these issues is still in its infancy.

So if all this is still there why bother with async mode at all? Because it DOES significantly lower the overall jitter of the system. Remember that in the adaptive mode the clock comes from a frequency synthesizer of some sort, these will ALWAYS have significantly higher jitter than a good fixed frequency clock, so going with async DOES eliminate the inherent jitter of the frequency synthesizer. It may not eliminate all sensitivities to cables and such, but that doesn't mean its useless. It still serves a very important task of significantly lowering the over jitter of the system.

There is NOTHING in the designers arsenal of tricks that will eliminate jitter completely, its the designers task to pick and choose a series of techniques which each attenuates the jitter by varying amounts. Every DAC on the market will have a different set of these techniques which will affect the final sound in different ways. Different designers will have different levels of expertise in these different approaches which will determine how well they are implemented.

I guess I'm trying to say that there are no cut and dried formulas for reaching perfection at this time. Its still very much an art form. As we go forward the body of knowledge increases and the overall level of these devices is going to improve, but at least for the foreseeable future the process of designing and choosing digital audio hardware is going to resemble that of guitars and violins more than it does computers. There is going to be a wide range of products to choose from and you really have to experience them rather than just looking at a few specs in the catalog.

PS This post focused on aspects of jitter because that was what the thread was about, but that does not mean that jitter is the only thing of importance in DAC design, its just one of the many different parts that have to work together to make the final product. It just happens to be the new kid on the block so there is a lot to learn about managing it properly.

John S.