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My new DAC (long, but with pictures)

Howdy all

It's been a while since I posted at the Asylum so I thought I might update you all on what I've been doing:

I built a DAC:

My goal wasn't to build the most cost effective solution: I wanted to verify some ideas I had. If I built a no holds barred board and it didn't work I would know that I had failed fundamentally and not just because I chose cheap solutions.

The board is a monster:

Number of copper layers: 6
Board outline(s) extent: X = 455 MM; Y = 330 MM
Number of parts: 1471
Number of pins: 5284 (258 through-hole, 5026 SMT)
Number of vias: 3205
Number of holes: 3463

It's features are outlined below. But first some history:

A few years ago I thought I'd make a DSD based DAC and since I'm a software guy I started out by prototyping a quick and dirty output stage, just some passives filtering the raw DSD in an Sony DVP-S9000ES:

Then since I'd never built hardware before I cobbed a quick dual output power supply:

I simulated some of my ideas with the demo version of MicroCap 9 (http://www.spectrum-soft.com/index.shtm) and tho things looked good I didn't know what tools were available so I contracted a quick layout of my schematics:

The boards were daisy chainable and I had three built with differing output stage component selections. I could just use my preamp input selections to A/B/C the boards.

The boards sounded pretty good, but there was some "breathing" in the gaps between notes and the output level was much to low for most systems.

I found FreePCB (http://www.freepcb.com/) and figured out how to export my schematics from MicroCap and built my next board with better power supplies and a different DSD amplifier and a custom VCO from Vectron with 200ppm pull and DSD x 8 frequency:

It sounded like crap :) Too much aliasing, worse "breathing", more crunchy. Yuck!

Also the clock circuitry drew so little current that the voltage in the clock power supply floated too high:

After thinking for a while I surmised that I needed double rate DSD and more solid power supplies. After running some experiments to verify various hypotheses I laid out my current board using the following guidelines:

1) Clean power
2) Clean DSD switching
3) Clean clocking
4) Good isolation

I built better power supplies with lots of filtering. (There are 9 of them including 3 for the FPGA, left analog, right analog, 2 ECL and two for the clock.)

I used ECL for clean distribution of the DSD.

I kept the custom Vectron oscillator modules, but I added more filtering of the control signals and their own power supply.

The board is dual mono, balanced differential so there is essentially no chance for even order harmonic distortion and I selected my bypassing, etc. to keep the THD below the 120dB noise floor, at least in the simulations. I haven't had the chance to use something better than my PicoScope to look at distortion, but it shows no distortion withing it's noise floor from about 7Hz up to 20kHz (where I stopped looking.)

To assist in noise control I made sure everything was electrically isolated: output transformers, power supply transformers, AES/EBU and SPDIF transformers, optical connectors for TOSLink or Meitner ST glass DSD.

To save on popcorn logic and to allow easy processing of PCM to DSD I put on a Xilinx FPGA along with the MIPS MCU controlling processor. The FPGA also allows me to avoid other LSI chips like AES/EBU and S/PDIF receivers... No PLLs here :)

The board can process:
1) DSD hard wired (well thru a digital isolator)
2) DSD via Meitner orange ST glass
3) TOSLink

The PCM can be 44.1, 48, 88.2, 96, 176.4 or 192.

I synchronously upsample all PCM to 28,224,000 Hz then to double rate DSD (5,644,800 Hz) and also I upsample DSD to double rate DSD.

It's dynamic, "fast", easy to listen to, has a flat freq response and has no grit or jitter edginess.

The board with no case, just sitting on a cardboard box, and with no magic power cords or interconnects, etc. and using a USB to S/PDIF converter then a S/PDIF to TOSLink converter sounds better than my Meitner or anything else I've heard.

When I had my hypersensitive pregnant daughter A/Bing it vs. the Meitner DAC6e her body jerked each time I selected the Meitner and on about the fourth switch she said "Stop that" :)

A few more pictures:

The raw board:

The processor and FPGA (and lots of bypass)

Bring up of 2nd board:

Early FPGA dev with a Xilinx eval board:


P.S. I still don't have enough time to read everything here, but I'll at least watch this post for a while and try not to be too cagey :)

Edits: 10/25/10

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Topic - My new DAC (long, but with pictures) - Ted Smith 16:45:50 10/24/10 (59)


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