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Re: my take

Newb,

I am not sure what the NC1 and Dice are but I don't think they are going to offer chips solutions. The NC1 goes for $300 each. That is a bit much just for the chip and drivers.

VCXO's are set to a freq like 11.2896 (most typical for 44.1K MCLK). They vary with a DC voltage applied to the control pin so they can be matched to the incoming stream with a range of around 100-200ppm (Parts per million). On the 1020 and 3200 from Ti the PLL is actually done in software and is pretty good at reducing the intrinsic jitter to a low amount.

Remember in itself Firewire and USB do not have jitter because there is no clock mutiplexed over the data like there is in SPDIF.

So intrinsic jitter is anything that exists because of the creation of clocks or the way it's made etc...

Bettering these parts usually means using ASYNC with a low jitter clock or external VCXO or custom stuff.

Thanks
Gordon
J. Gordon Rankin


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  • Re: my take - Gordon Rankin 14:37:37 02/28/07 (0)


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