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Upsamplers, DACs, jitter, shakes and analogue withdrawals, this is it.

RE: Slew rate.

Hi Rick,

I believe that the digital input receiver switching threshold sensitivity is indeed the same, at 200mV, between the AES3 ( balanced), and the AES3id (single ended, aka S/PDIF) formats. The driver amplitude specs. greatly differ, however, with balanced transmission levels being anywhere from 2V to 7V pk-pk, while single ended is typically 500mV pk-pk. I can only assume that such a large dynamic range is included in the balanced spec. for reason of enabling greater noise immunity in professional applications.

It will take several times longer for a 2V - 7V drive signal to switch/slew back through that 200mV reciever threshold, than it would for a 500mV drive signal. Longer signal switching times contribute to jitter. While a differential driver would have twice the slew rate of an single ended driver, an AES3 compliant signal will force the differential driver to swing at least four times the voltage. So, the differential driver travels twice as fast, but also must travel at least four times as far.

As far as LVDS is concerned, swinging lower amplitude voltages reduces EMI/RFI, and also increases the driver data rate/bandwidth. Think of it in terms of the gain-bandwidth product of the driver circuit. Lower gain due to reduced output signal amplitude requirements affords greater signal bandwidth.

_
Ken Newton



Edits: 06/01/12

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