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Digital Drive Upsamplers, DACs, jitter, shakes and analogue withdrawals, this is it. |
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Digital Drive Upsamplers, DACs, jitter, shakes and analogue withdrawals, this is it. |
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In Reply to: RE: Two stage PLL posted by AbeCollins on January 29, 2009 at 09:10:18:
The secondary PLL can't track the input clock fast enough, which is the whole idea, so it is best to have a small data buffer (though some don't). There are many ways to implement the secondary clock, and some digital filters have a data buffer on the input that can be used to maintain short term sync as well. Of course, originally we were talking about a DAC without a digital filter, but something like the BB DF1704 is pretty forgiving with clock sync between the bit clock from the receiver and the "new" master clock, if that route is taken.
Edits: 01/29/09
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Follow Ups
- You need to buffer a few bits to avoid dropouts - Slider 09:21:05 01/29/09 (0)
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