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Digital Drive Upsamplers, DACs, jitter, shakes and analogue withdrawals, this is it. |
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Digital Drive Upsamplers, DACs, jitter, shakes and analogue withdrawals, this is it. |
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In Reply to: diminishing returns? posted by Slider on January 28, 2009 at 20:23:59:
Is this the norm in most DACs? See Q&A below from the Apogee Electronics website:
TOPIC: Can you tell me about the Mini-Dac and how it re-clocks?
All of our DACs, including the Mini-DAC, employ what is known as "dual clocking", whereby one "loose" clock locks to the incoming digital signal, bits are stored into a buffer, and then a very low jitter clock is used to clock data out of this buffer to the D-A converters. What this means for you is that the MiniDAC is impervious to clock jitter coming from the digital input, and jitter at the D-A converter (where it counts) is quite low.
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Follow Ups
- Related Question on "dual clocking" and buffering... - AbeCollins 08:38:28 01/29/09 (3)
- Two stage PLL - Slider 09:02:52 01/29/09 (2)
- RE: Two stage PLL - AbeCollins 09:10:18 01/29/09 (1)
- You need to buffer a few bits to avoid dropouts - Slider 09:21:05 01/29/09 (0)
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