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Logic induced modulation and jitter

I read a very plausible explanation, but unfortunately can't find the link, otherwise I'll include it here.

Basically, as we all know logic transitions in digital circuits are edge trigerred through level changes. Ie. the precise point in time at which a 1 becomes a 0 is approximately halfway between a voltage transition from say 5V to 0V.

Therefore the precise timing of logic transitions is heavily influenced by the stability of the voltage rails.

So the theory is anything that can cause micro voltage fluctuations can cause jitter. Even things like power cords, connecting cables from one device to another, variations in speed of a fan or motor, etc.

Anyway, the theory seems plausible to me. The link which I can't find at the moment provides some empirical data around typical voltage fluctuations caused by logic induced modulation, and corresponding impact on jitter.

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