Computer Audio Asylum

Explanation

208.100.141.234

In Reply to: RE: Contamination as in Electircal Noise posted by cics on March 26, 2008 at 23:51:16

"If there's ripple voltage riding on the data input single (for example), are you saying this will NOT impact jitter? If so, how?"

If the setup and hold times are not violated, then the data will be clocked into the first flip-flop inside the D/A chips without error. If it meets these criteria, then only the clock that clocks the data has any effect on the timing. This is fundamental synchronous logic 101.

"Data sent to chip is at bit level where the bit clock matters. How else would the chip determine actual signal amplitudes (16 or 24bit)?"

Data sent to the chip is either ones or zeroes. It is the output of the D/A where the voltage varies. The contents of each data frame on the input determines the word size. The frequency of the input stream to the D/A chip determines the sample-rate.

There is a lot of misinformation and misunderstanding of these processes. Listen to the engineers that have the education in these areas.

Steve N.

Follow Ups:

RE: Explanation - cics 06:08:35 03/29/08 (2)
- RE: Explanation - kana813 21:37:35 03/29/08 (0)
- RE: Explanation - audioengr 11:12:47 03/29/08 (0)

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