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In Reply to: RE: USB and clocks posted by kgiessler on May 27, 2007 at 15:30:49
Burr-Brown's Hitoshi Kondoh wrote this article that I think covers what you're thinking about. USB DACs have similar issues to contend with as S/PDIF. The product he's discussing isn't a high-end product, but the concepts are the same. The basic problem is that the interface is "pushing" data at the DAC at a fixed rate. To prevent buffer overrun or underrun, the DAC must slowly adjust its clock frequency so its average frequency matches that of the data being "pushed" in. The ability of the clock in the DAC to adjust itself (usually done with a PLL) is what also makes jitter reduction to ultra-low levels very difficult.
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