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I replaced the CS8412 in my AN DAC kit 1.2 with a CS8415A and a shift register. The 24-bit, right-justified output of the CS8415A is shifted right six bits yielding 18-bit samples for the AD1865. The CS8415A is a definite improvement over the CS8412. Shifting an additional one or two bits reduces the DAC’s settling time and that yields even greater clarity and dynamics.
Settling time, usually measured in hundreds of nanoseconds, is the time it takes the analog output to change to the most recent sample value and is a function of step size. Right-shifting the sample data one or two more bits reduces the RMS step size by a factor of two or four and thus reduces RMS settling time by a similar amount.
Pictured is a prototype. (The CS8415A is on the underside of the PCB.) I’m working on a revision that adds deemphasis and other status outputs.
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