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RE: Different DAC chip in the Dac 2.1 to Run I2s?

Posted by jmlpartners on February 27, 2009 at 19:12:29

In Reply to: RE: Different DAC chip in the Dac 2.1 to Run I2s? posted by Lizard_King on February 27, 2009 at 15:32:41:

USB to I2S is superior sounding and has lower jitter.

As to sounding superior, that's a matter of opinion: I doubt anyone making such a claim has used an AD1865 for evaluation. As to lower jitter, that depends on which clock you measure. Most S/PDIF jitter measurements look at MCLK jitter because most modern DACs update their output on a particular BCLK edge and BCLK is derived from MCLK. MCLK is very susceptible to data-correlated jitter, especially in older DIRs, such as the CS8412/14. On the other hand, the AD1865 updates its output on an edge of WCLK and is mostly immune from data-correlated jitter. Going from USB=>S/PDIF=>AD1865 will have about the same amount of sample clock jitter as USB=>I2S=>AD1865.

The AN1865N DAC can not have a Is2 input.

Duh. That’s why I suggested modifying a USB=>I2S board to output the kind of signal the AD1865 wants to see. That’s what you should do if you are convinced eliminating S/PDIF from the USB input chain will improve things. But before you do that, I suggest you read the USB-Audio spec regarding jitter and decide if anything you do downstream will really help.

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