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In Reply to: RE: The data does cause clock jitter posted by Slider on March 29, 2008 at 11:55:44
Many implementations do suffer from ground-bounce and crosstalk, so I agree this can be a problem. I have found that designs in the field of consumer electronics are frought with these problems, even from large multinational companies. Many of the mods that I have done in the past repair these types of problems.
I implement many of the isolation techniques you mention in my own products, so I dont have this problem. My circuits behave closer to the ideal. Separate power feeds, isolated return traces, effective decoupling and termination/impedance matching etc..
This is simply ground-bounce and crosstalk between traces and with power supply. With proper circuit design and board layout, these can effectively be minimized so that they are inaudible.
But I haven't heard your stuff so can't comment on that.
I think we've talked about this before, but separate return paths don't really effectively address the problem since the signals generally all share the same source and return pins. Better to have a close layout with an extremely low impedance return path (typically an uninterrupted ground plane directly above the signal traces) except this isn't always possible if you want the digital filter and all of the other high jitter signals isolated from your clean clock and D/A convertor.
One method that works pretty well for me is generating the clocks in an isolated section (using BB ISO 150 device) along with the D/A convertor and analog stage, and then clocking the data across the barrier. Not perfect, and everybody has their own way, but you have to break the jitter path at some point.