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In Reply to: RE: Is there really any advantage in balanced digital lines over unbalanced? posted by knewton on June 01, 2012 at 06:24:57
"That potential benefit [doubled slew rare] is erased if the signal voltage itself is more than double what it needs to be."
I don't understand why that would be. Is the gain of the receiver lower (or the undefined regions larger) in the systems that use the higher amplitudes?
Just the other day I read a post saying that the AES receivers had the same thresholds as the EBU (or whatever they are) ones used but AES driver levels were higher.
Also I rather thought that the big advantage of the 'LV' part of LVDS was lower emissions at a given data rate due to both balance and less signal energy in play, but I've never actually used it.
Thanks, Rick
Follow Ups:
Hi Rick,I believe that the digital input receiver switching threshold sensitivity is indeed the same, at 200mV, between the AES3 ( balanced), and the AES3id (single ended, aka S/PDIF) formats. The driver amplitude specs. greatly differ, however, with balanced transmission levels being anywhere from 2V to 7V pk-pk, while single ended is typically 500mV pk-pk. I can only assume that such a large dynamic range is included in the balanced spec. for reason of enabling greater noise immunity in professional applications.
It will take several times longer for a 2V - 7V drive signal to switch/slew back through that 200mV reciever threshold, than it would for a 500mV drive signal. Longer signal switching times contribute to jitter. While a differential driver would have twice the slew rate of an single ended driver, an AES3 compliant signal will force the differential driver to swing at least four times the voltage. So, the differential driver travels twice as fast, but also must travel at least four times as far.
As far as LVDS is concerned, swinging lower amplitude voltages reduces EMI/RFI, and also increases the driver data rate/bandwidth. Think of it in terms of the gain-bandwidth product of the driver circuit. Lower gain due to reduced output signal amplitude requirements affords greater signal bandwidth.
_
Ken Newton
Edits: 06/01/12
"It will take several times longer for a 2V - 7V drive signal to switch/slew back through that 200mV reciever threshold, than it would for a 500mV drive signal. Longer signal switching times contribute to jitter. While a differential driver would have twice the slew rate of an single ended driver, an AES3 compliant signal will force the differential driver to swing at least four times the voltage. So, the differential driver travels twice as fast, but also must travel at least four times as far."
Yes - slew rates being equal, a doubling of peak voltage, means it takes twice as long to make the transition from peak voltage to zero (for instance). {I got momentarily confused when you were talking about "travel" until I realized you were talking about the transition from peak voltage to zero)
The biggest issue I think we'd find with SPDIF coaxial cable and AES/EBU balanced line is the connectors. The 75 Ohm coaxial for SPDIF is pretty good for impedance control if it is terminated in BNC, and not too bad for shielding, provided grounding is done properly. The RCA end is not very well controlled for impedance, so can introduce some issues. AES/EBU has the same issue with impedance - and in fact may be slightly worse, yet the folks at Berkeley Audio seem to think it is by far the superior interface!
"Knowledge is knowing that a tomato is a fruit. Wisdom is knowing not to put it in a fruit salad"
"It will take several times longer for a 2V - 7V drive signal to switch/slew back through that 200mV reciever threshold, than it would for a 500mV drive signal."
Well... Not if the signals have the same slew rate, they would actually spend the same time in the transition region of the receiver and at the receiver end that's the noise window. Likewise the doubling of the effective slew rate would still apply in that window regardless of the saturation limits of the driver.
Mind you I'm not saying that LVDS isn't superior, especially for EMI. It was designed to be after all and it's lower slew rates for a given bandwidth should be a good thing for the transmitter's power supply (to John's point).
Regards, Rick
Yes, moving from zero volts through that 200mV receiver threshold will take the same amount of time for two signals having identical slew rates. I think what you've overlooked is the time required for the signal to swing back from it's peak value to cross zero volts again. The signal does not swing only in one direction, it must return from where it came. A 2V peak signal will take twice as long to return back to zero than will a 1V peak signal, assuming identical slew rates.Remember, slew rate is measured as the change in Volts per unit of time. If the Volts are greater, then the total amount of transit time is also greater. Otherwise, it would be like saying that a car traveling at 60 miles per hour requires the same amount of time to make a 20 mile round trip as it does to make a 10 mile round trip.
_
Ken Newton
Edits: 06/01/12 06/01/12
Hi Ken,
I wasn't forgetting the time that the signal spends outside the receiver window, rather I was saying that it doesn't matter. Now that may be a questionable assertion but I do want to be clear.
Noise in the amplitude domain only gets detected and translated to the time domain at the receiver's threshold (or "slicing point" in barcode speak). The process is essentially the mirror of slope detecting FM and the slope in this case is the slew rate of the signal when it's within the peak amplitude of the noise to the receiver's threshold. Outside of this window it's simply ignored.
So... That means that the higher voltage swing shouldn't matter as long as the slew rate stays up, at least from the receiver's standpoint. QED? Prolly not but it's fun kicking this stuff around...
Regards, Rick
PS: I recognize that the whole human worldview is based on assumptions so of course I'm making plenty of them. I think the most pivotal one I'm making for this argument is that there is no memory mechanism extant which would encode external noise into the signal during the periods when it is well away from the threshold that get's worse with higher amplitude limits.
Okay, I think I see what you are drving at. Yes, given identical slew rates the time required to transition through the reciever switching threshold will be the same. Aside from this, and admittedly not part of my original point, is that the data bandwidth of the lower voltage signal can be greater.If we take two otherwise identical drivers, the one required to swing less voltage can consequently have a higher slew rate. Amplifier slew rate is a function of a number of parameters, one of which is voltage gain. For a given input signal amplitude, the driver swinging 7V will require 14x the gain of the driver swinging only 500mV. Therefore, the driver having the lower gain can also have a significantly faster slew rate.
What I was intending to indicate is that an AES3 compliant driver could have a higher slew rate if the driver's voltage gain, and thereby, the output signal voltage swing, were reduced. The noise immunity afforded by a whopping 7V signal, while perhaps of benefit in certain noise prone professional environments, is just not needed in the home environment. Said another way, it seems to me that the AES3 driver voltage spec. sacrifices the potential for greater driver slew rate (reducing jitter) for greater receiver noise immunity.
_
Ken Newton
Edits: 06/02/12 06/02/12 06/02/12 06/02/12
"the data bandwidth of the lower voltage signal can be greater."
I'm all in favor of that. Believe me I'm not a fan of bad interfaces, and the scope of my comment was very limited. I certainly wasn't advocating the scheme we were discussing!
Interfaces of all sorts are important and in general I think their lack of adequate definition and control in home audio is the root of most audio oddities discussed on this site.
Rick
But as with many things in audio, it really depends on a variety of unspecified parameters. Jitter is often dominated by waveform distortion products, so higher slew rates necessitate a wider bandwidth interface, and the jitter may actually become worse in a bandwidth-limited interface. Some have actually improved performance by limiting the transmission slew rate, and clock filters are even sometimes useful in D/A convertors.
Impedances need to be matched throughout the interface. If the driver output, cable, connector, and receiver termination impedances (not to mention the power supply decoupling) are not correct, then there's little that simply increasing slew rate can do to improve the situation. It may make things worse, as you suggest. Our discussion of reducing interface jitter by increasing driver slew rate assumes that the related interface parameters have been properly addressed.
_
Ken Newton
Edits: 06/03/12
The higher voltage may still have effects downstream. The extra current drawn as a result of saturation at the receiver may induce ground bounce or other coupling mechanisms, plus the flat part of the backwards "S" curve isn't completely flat.
If it weren't for these effects and if the clock architecture could be arranged to keep the DAC clock clean then bits could just be bits and the arguments would be over. Otherwise, you have to look at all the components down to the transistor and transmission line level. Good luck, with understanding these complex non-linear circuits, even assuming you have access to the needed information of what is inside the chips.
Tony Lauck
"Diversity is the law of nature; no two entities in this universe are uniform." - P.R. Sarkar
"extra current drawn as a result of saturation at the receiver may induce ground bounce..."
Well, yea,
But you sorta need to ignore those secondary issues to discuss particular concepts. Of course in real life they may eat your lunch...
Rick
But the whole discussion is about second order effects. To the first order, "bits are bits."
Tony Lauck
"Diversity is the law of nature; no two entities in this universe are uniform." - P.R. Sarkar
One other incidental affect of the higher drive voltage is increased ground plane noise in the transmitter. This can very easily produce higher jitter.
I've actually measured the increase in ground plane noise in a couple casses but I don't have the right instruments to see if there was an increase in jitter.
John S.
What is the frequency spectra of this ground plane noise?
Tony Lauck
"Diversity is the law of nature; no two entities in this universe are uniform." - P.R. Sarkar
John, I concur. In general, ground noise contamination is a significant jitter producing mechanism.
_
Ken Newton
So looking at this aspect, is the advantage (if any) to single ended or AES/EBU?
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