In Reply to: RE: Some kind questions about reclocking posted by knewton on January 27, 2015 at 11:36:16:
Hi,
> The term "re-clocking" has been commonly used to describe
> decidedly different jitter reduction methods.
Thank you. This is what I wanted to bring out.
There is no clear definition here.
If I am taking the System Clock from the SPDIF receiver (which is PLL derived from the data and usually high in jitter) and the use this clock to re-clock the signals to the DAC Chip, before they enter the DAC Chip I can claim "special re-clocking".
Of course, it will not lower the transfer of source jitter and so it will not make the DAC less sensitive to source jitter, even though it may, in practice improve the sound quality of the DAC nevertheless (or make it worse, as such things may be).
On the other hand, what I showed is a case where a new FFL (not PLL) is used to create a new clock that is very low in phase-noise (in practice close to the phase-noise of the crystal oscillator serving as reference for the FFL) and is normally completely static in frequency once locked (I find several minutes between each clock update, which is normally a singe 40ppb (parts per billion) step.
So as long as the actual receiver can lock onto the source stream the re-clocking system removes all source jitter from the SPDIF stream. That too could be called "special re-clocking".
So it is definitely worthwhile understanding exactly what sort of re-clocking technology is employed, rather than to just take the ad-copy and say: "Oh re-clocking - good, now I do not need to worry about crappy sources"...
Because, you might still have to after all.
Thor
At 20 bits, you are on the verge of dynamic range covering fly-farts-at-20-feet to intolerable pain. Really, what more could we need?
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Follow Ups
- RE: Some kind questions about reclocking - Thorsten 19:18:26 01/27/15 (0)