In Reply to: RE: Re-Clocking posted by ahendler on December 26, 2014 at 16:01:25:
Many of these external so-called re-clocking units are more correctly called re-sampling units. They utilize Asynchronous-Sample-Rate-Conversion (ASRC) technology, which alters the actual sample amplitude values in order to effectively filter jitter from the incoming signal. This process creates two independent clock domains, that of the incoming signal, and that of the re-sampled outgoing signal. There are also jitter reduction circuits which do not change the sample values yet still produce two nearly independent clock domains. These circuits typically utilize a speacialized memory function known as an asynchronous FIFO.A DAC box might internally contain either, or none of these two effective jitter reduction technologies. In addition, there is yet another common meaning for the term re-clocking, where in a new clock domain is not created, the data and any derived synchronous clock signals are simply re-aligned to the one existing clock domain.
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Ken Newton
Edits: 12/26/14
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Follow Ups
- RE: Re-Clocking - knewton 17:22:18 12/26/14 (0)