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Has anyone looked at alternative approaches (modifications) to reducing jitter in an Audio Note Dac, specifically an AN Dac 1.1x /II Signature, which uses the AD1865 model Dac chip. I don't know about the clock. In fact I know very little about the Dac board, which is why I ask.
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Hi, Search the AA for the Wildmonkeysects loopfilter or Google.
A comparator at the SPDIF input also improves things like in Buffalo DAC or search Elso's idea on diyaudio.com
I also experienced a 74HC04 on the Wordsync of one audio channel works better than Audionote's implementation of the 74HC02.
The analog supply of the CS8412 needs to be low noise.
See f.a Yuri' s DAC:
http://www.geocities.com/yury_g/dac1865.gif
and
http://db.audioasylum.com/cgi/m.mpl?forum=tweaks&n=30313&highlight=wildmonkeysects+elso&session=
and
Hello,
the Audionote DAC is built with simplicity in mind, there is no jitter reduction circuitry in it, in fact the DAC IC (AD1865) is connected trough
simple logic IC to the SPDIF receiver. Therefore whatever jitter comes in it gets directly to the AD1865.
The way to reduce jitter in Audionote DAC, you can use external jitter reduction boxes.
I notice that you always post your link to 3d audio even though it may not be relevant to the question.
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Edits: 01/30/09
I thought that my profile is visible to all users.
We are manufacturer of very high quality tube amplifiers and DACS.
Sorry, can't see your profile.
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"Has anyone looked at alternative approaches (modifications) to reducing jitter in an Audio Note Dac".
He he! I do believe Audio Note have looked at it and decided not to bother. If Audio Note put much importance on jitter measurements, their DACs wouldn't exist - and wouldn't be so popular either. :0)
Best Regards,
Chris redmond.
I respect the decisions made at AN. I bought the product, right? But now I own it, I want to reduce the jitter.
"Live free or die"
They obeyed the laws of diminishing returns......while extreme jitter reduction might have audible results, at some point you have to say enough is enough because you can never have zero jitter
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But they don't use any jitter reduction, and unfortunately the Crystal CS8412/14 type input receivers used produce a lot of data correlated jitter on the clocks.
Goes to show that low jitter isn't necessarily required for satisfying digital music reproduction, though a DAC like this does mean you have to be more careful with the transport and interface to minimize source jitter and achieve a good match.
To answer the original question, the PLL feedback components can sometimes be optimized to help improve the jitter rejection of the input receiver with your setup since you probably aren't as concerned as the manufacturer is with fast clock acquisition and maintaining lock over a wide frequency range. Try a larger capacitor for starters. Beyond that, you would need to make circuit changes.
Is this the norm in most DACs? See Q&A below from the Apogee Electronics website:
TOPIC: Can you tell me about the Mini-Dac and how it re-clocks?
All of our DACs, including the Mini-DAC, employ what is known as "dual clocking", whereby one "loose" clock locks to the incoming digital signal, bits are stored into a buffer, and then a very low jitter clock is used to clock data out of this buffer to the D-A converters. What this means for you is that the MiniDAC is impervious to clock jitter coming from the digital input, and jitter at the D-A converter (where it counts) is quite low.
I don't know for sure what they use, but sounds like a fairly typical 2-stage phase lock loop design, whereby the first stage is in the input receiver (note that the commonly used input receivers such as the CS8412/14 I mentioned above don't really have any jitter rejection in the audio band, and create quite a bit of their own), and then the clock is filtered by another PLL with a much lower cutoff frequency. This is usually the first step that is taken by most manufacturers to lower clock jitter, and is fairly effective, but never as much as the advertisements claim. Only so much you can do with a filter, and they are almost always implemented in the same clock domain, meaning that some of the input jitter gets to the new clock directly, without being filtered. And if using a narrow band VCXO, you need a separate one for each clock rate, usually 11.2896M and 24.576M to cover the multiples of 44.1K and 48K.Much more effective are those rare few that isolate the secondary PLL from the input stage, and run it at a very low frequency as a VCXO driven multiplier to reconstruct the clocks in a "clean" domain, thus not syncing to each clock cycle. The "new" master clock can be nearly free running in this configuration, maybe only adjusted with an integrated current charge every few seconds to maintain sync, and if the system is designed with care, can lead to very low jitter. I've built systems like this and measured data correlated clock jitter reduction of over 1000x when comparing the input receiver master clcok to that at the D/A convertor.
Some of the original Mark Levinson DACs in the mid 90s used a somewhat similar approach, though I believe they relied on a microprocessor and programmable DAC to adjust the control voltage on the VCXO about once every second.
Edits: 01/29/09 01/29/09
Thanks for your comments on the "two stage PLL". They did mention something about buffering the data then reclocking so I'm wondering if this is simply two PLLs, one after the other, or perhaps a bit more complex.
The secondary PLL can't track the input clock fast enough, which is the whole idea, so it is best to have a small data buffer (though some don't). There are many ways to implement the secondary clock, and some digital filters have a data buffer on the input that can be used to maintain short term sync as well. Of course, originally we were talking about a DAC without a digital filter, but something like the BB DF1704 is pretty forgiving with clock sync between the bit clock from the receiver and the "new" master clock, if that route is taken.
Edits: 01/29/09
I will reduce noise to that circuit first and then think about jitter reduction in the audible range. I have some help.
"Live free or die"
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